Speaker
Description
The communication of spike events constitutes a major bottleneck in simulations of brain-scale networks with realistic connectivity. Models such as the multi-area model1 not only have a dense connectivity within areas but also between areas. Synaptic transmission delays within an area can be as short as 0.1 ms and therefore simulations require frequent spike communication between compute nodes to maintain causality in the network dynamics2. This poses a challenge to the conventional round-robin scheme used to distribute neurons uniformly across compute nodes disregarding the network’s specific topology.
We target this challenge and propose a structure-aware neuron distribution scheme along with a novel spike-communication framework that exploits this approach in order to make communication in large-scale distributed simulations more efficient. In the structure-aware neuron distribution scheme, neurons are placed on the hardware in a way that mimics the network’s topology. Paired with a communication framework that distinguishes local short delay intra-area communication and global long delay inter-area communication, the structure-aware approach minimizes the costly global communication and thereby reduces simulation time. Our prototype implementation is fully tested and was developed within the neuronal simulator tool NEST3.
For the benchmarking of our approach, we developed a multi-area model that resembles the macaque multi-area model in terms of connectivity and work load, while being more easily scalable as it retains constant activity levels. We show that the new strategy significantly reduces communication time in weak-scaling experiments and the effect increases with an increasing number of compute nodes.
Acknowledgements
This research was supported by the Joint Lab “Supercomputing and Modeling for the Human Brain”.
References
[1] Schmidt et al., PLoS Comput Biol, 14(10), 1-38, 2018
[2] Morrison & Diesmann, Springer Berlin Heidelberg, pp 267-278, 2008
[3] Gewaltig & Diesmann, Scholarpedia 2(4):1430 , 2007
| Preferred form of presentation | Poster & advertising flash talk |
|---|---|
| Topic area | Simulator technology and performance |
| Keywords | brain-scale simulation, network topology, communication scheme |
| Speaker time zone | UTC+2 |
| I agree to the copyright and license terms | Yes |
| I agree to the declaration of honor | Yes |
